At the core of the SoM is the Efinix Ti135 FPGA, fabricated on a TSMC 16nm process and featuring the Quantum™ compute fabric.
This fabric includes:

• Up to 129,600 logic elements using eXchangeable Logic and Routing (XLR) cells
• 960 blocks of 10-kbit SRAM (totaling ∼ 9.83 Mbits)
• 480 DSP blocks supporting integer and BFLOAT16 computations
• A quad-core hardened RISC-V processor with full support for RV32IMACFD extensions

This makes the SoM6 Ti135 a strong candidate for edge computing, real-time control, and vision-centric workloads.

The SoM integrates several high-speed interfaces:

• Two full-duplex transceiver banks (not fully routed on the SoM) capable of, 10G Ethernet (10GBase-KR), SGMII, and PMA Direct operation with data rates from 1.25 Gbps to 12.5 Gbps per lane. PCIe Gen 4 is supported at x1 only.
• Dedicated SERDES routing for PCIe and 10G Ethernet
• Extended MIPI D-PHY capabilities supporting up to 2.5 Gbps per lane (TX and RX) via two 30-pin FPC connectors
• A RAW-PMA interface for implementing proprietary high-speed protocols over transceivers

All additional I/O, including power, configuration, and general-purpose signals, are routed through a 240-pin connector (Samtec ADF6–60–03.5–L–4–2–A). This connector is primarily pin-compatible with the AMD Kria K24 SoM, offering a migration path or interoperability for carriers; however, full application-level compatibility cannot be guaranteed due to architectural differences between Efinix’s and AMD’s FPGAs

For onboard non-volatile memory, the SoM6 Ti135 includes:
eMMC flash storage (soldered on-module for robustness and space efficiency)
Security is a key focus, with the module integrating the Infineon SLS32AIA010MLUSON10XTMA2 TPM (Trusted Platform Module).
This hardware root-of-trust device supports:

• Secure key storage
• Cryptographic operations
• Platform integrity verification