More Evaluation Boards
still 23 pcs in stock.
Prevent Overbuilding and secure your design with the FPGA Lock IP.
For details please refer to TRS-STAR: FPGA Lock IP.
The FPGA-Lock-PMOD Dongle shares a common secret with the FPGA-LOCK-EVAL IP. The FPGA-LOCK-EVAL IP is intended for evaluation purposes only.
Standard lead time: 2-3 days